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VERILATOR(1) User Contributed Perl Documentation VERILATOR(1) NAME Verilator - Lint, compile and simulate SystemVerilog code using C++/SystemC SYNOPSIS verilator --help verilator --version verilator --binary -j 0 [options] [source_files.v]... [opt_c_files.cpp/c/cc/a/o/so] verilator --cc [options] [source_files.v]... [opt_c_files.cpp/c/cc/a/o/so] verilator --sc [options] [source_files.v]... [opt_c_files.cpp/c/cc/a/o/so] verilator --lint-only -Wall [source_files.v]... DESCRIPTION The "Verilator" package converts all synthesizable, and many behavioral, Verilog and SystemVerilog designs into a C++ or SystemC model that after compiling can be executed. Verilator is not a traditional simulator, but a compiler. For documentation see <https://verilator.org/verilator_doc.html>. ARGUMENT SUMMARY This is a short summary of the arguments to the "verilator" executable. See <https://verilator.org/guide/latest/exe_verilator.html> for the de- tailed descriptions of these arguments. <file.v> Verilog package, module, and top module filenames <file.c/cc/cpp> Optional C++ files to compile in <file.a/o/so> Optional C++ files to link in +1364-1995ext+<ext> Use Verilog 1995 with file extension <ext> +1364-2001ext+<ext> Use Verilog 2001 with file extension <ext> +1364-2005ext+<ext> Use Verilog 2005 with file extension <ext> +1800-2005ext+<ext> Use SystemVerilog 2005 with file extension <ext> +1800-2009ext+<ext> Use SystemVerilog 2009 with file extension <ext> +1800-2012ext+<ext> Use SystemVerilog 2012 with file extension <ext> +1800-2017ext+<ext> Use SystemVerilog 2017 with file extension <ext> +1800-2023ext+<ext> Use SystemVerilog 2023 with file extension <ext> --no-aslr Disable address space layout randomization --no-assert Disable all assertions --no-assert-case Disable unique/unique0/priority-case assertions --assert-unroll-limit <iter> Max SVA assertion repetition before erroring --autoflush Flush streams after all $displays --bbox-sys Blackbox unknown $system calls --bbox-unsup Blackbox unsupported language features --binary Build model binary --build Build model executable/library after Verilation --build-dep-bin <filename> Override build dependency Verilator binary --build-jobs <jobs> Parallelism for --build --cc Create C++ output -CFLAGS <flags> C++ compiler arguments for makefile --compiler <compiler-name> Tune for specified C++ compiler --compiler-include Include additional header in the precompiled one --constraint-array-limit <size> Maximum array size for constraint array reduction --converge-limit <loops> Tune convergence settle time --coverage Enable all coverage --coverage-expr Enable expression coverage --coverage-expr-max <value> Maximum permutations allowed for an expression --coverage-fsm Enable FSM state/arc coverage --coverage-line Enable line coverage --coverage-max-width <width> Maximum array depth for coverage --coverage-per-instance Enable per-instance coverage counters --coverage-toggle Enable toggle coverage --coverage-underscore Enable coverage of _signals --coverage-user Enable SVL user coverage -D<var>[=<value>] Set preprocessor define --debug Enable debugging --debug-check Enable debugging assertions --no-debug-leak Disable leaking memory in --debug mode --debugi <level> Enable debugging at a specified level --debugi-<srcfile> <level> Enable debugging a source file at a level --no-decoration Disable comments and lower spacing level --decorations <level> Set output comment and spacing level --default-language <lang> Default language to parse +define+<var>=<value> Set preprocessor define --diagnostics-sarif Enable SARIF diagnostics output --diagnostics-sarif-output <filename> Set SARIF diagnostics output file --dpi-hdr-only Only produce the DPI header file --dump-<srcfile> Enable dumping everything in source file --dump-ast-patterns Enable dumping Ast pattern statistics --dump-defines Show preprocessor defines with -E --dump-dfg Enable dumping DfgGraphs to .dot files --dump-dfg-patterns Enable dumping Dfg pattern statistics --dump-graph Enable dumping V3Graphs to .dot files --dump-inputs Enable dumping preprocessed input files --dump-tree Enable dumping Ast .tree files --dump-tree-addrids Use short identifiers instead of addresses --dump-tree-dot Enable dumping Ast .tree.dot debug files --dump-tree-json Enable dumping Ast .tree.json files and .tree.meta.json file --dumpi-<srcfile> <level> Enable dumping everything in source file at level --dumpi-dfg <level> Enable dumping DfgGraphs to .dot files at level --dumpi-graph <level> Enable dumping V3Graphs to .dot files at level --dumpi-tree <level> Enable dumping Ast .tree files at level --dumpi-tree-json <level> Enable dumping Ast .tree.json files at level -E Preprocess, but do not compile --emit-accessors Emit getter and setter methods for model top class --error-limit <value> Abort after this number of errors --exe Link to create executable --expand-limit <value> Set expand optimization limit -F <file> Parse arguments from a file, relatively -f <file> Parse arguments from a file -FI <file> Force include of a file --flatten Force inlining of all modules, tasks and functions --fourstate Enable fourstate logic --no-fourstate Disable fourstate logic --func-recursion-depth <value> Maximum recursive constant function depth --future0 <option> Ignore an option for compatibility --future1 <option> Ignore an option with argument for compatibility -fno-<optimization> Disable internal optimization stage -G<name>=<value> Overwrite top-level parameter --gate-stmts <value> Tune gate optimizer depth --gdb Run Verilator under GDB interactively --gdbbt Run Verilator under GDB for backtrace --generate-key Create random key for --protect-key --get-supported <feature> Get if feature is supported --getenv <var> Get environment variable with defaults --help Show this help --hierarchical Enable hierarchical Verilation --hierarchical-block <block> Internal use only for --hierarchical --hierarchical-child <block> Internal use only for --hierarchical --hierarchical-params-file <name> Internal option that specifies parameters file for hier blocks --hierarchical-threads <threads> Number of threads for hierarchical scheduling -I<dir> Directory to search for includes --if-depth <value> Tune IFDEPTH warning +incdir+<dir> Directory to search for includes --inline-cfuncs <value> Inline CFuncs with <=value nodes (0=off) --inline-cfuncs-product <value> Inline CFuncs if size*calls <= value --inline-mult <value> Tune module inlining --instr-count-dpi <value> Assumed dynamic instruction count of DPI imports -j <jobs> Parallelism for --build-jobs/--verilate-jobs --no-json-edit-nums Don't dump editNum in .tree.json files --no-json-ids Don't use short identifiers instead of addresses/paths in .tree.json --json-only Create JSON parser output (.tree.json and .meta.json) --json-only-meta-output <filename> Set .tree.meta.json output filename --json-only-output <filename> Set .tree.json output filename --l2-name <value> Verilog scope name of the top module --language <lang> Default language standard to parse -LDFLAGS <flags> Linker pre-object arguments for makefile -libmap Specify library mapping file --lib-create <name> Create a DPI library +libext+<ext>+[ext]... Extensions for finding modules +librescan Ignored for compatibility --lint-only Lint, but do not make output --localize-max-size <value> Tune localize optimization variable size --main Generate C++ main() file --main-top-name Specify top name passed to Verilated model in generated C++ main --make <build-tool> Generate scripts for specified build tool -MAKEFLAGS <flags> Arguments to pass to make during --build --max-num-width <value> Maximum number width (default: 64K) --Mdir <directory> Name of output object directory --MMD Create .d dependency files --mod-prefix <topname> Name to prepend to lower classes --MP Create phony dependency targets +notimingchecks Ignored -o <executable> Name of final executable -O0 Disable optimizations -O1 Default optimizations -O2 Stronger optimizations -O3 High-performance optimizations -O<optimization-letter> Selectable optimizations --output-groups <numfiles> Group .cpp files into larger ones --output-split <statements> Split .cpp files into pieces --output-split-cfuncs <statements> Split model functions --output-split-ctrace <statements> Split tracing functions -P Disable line numbers and blanks with -E --pins-bv <bits> Specify types for top-level ports --pins-inout-enables Specify that __en and __out signals be created for inouts --pins-sc-biguint Specify types for top-level ports --pins-sc-uint Specify types for top-level ports --pins-sc-uint-bool Specify types for top-level ports --pins-uint8 Specify types for top-level ports --no-pins64 Don't use uint64_t's for 33-64 bit sigs --pipe-filter <command> Filter all input through a script --prefix <topname> Name of top-level class --preproc-comments Include preprocessor comments in the output with -E --preproc-defines Include preprocessor defines in the output with -E --preproc-resolve Include all found modules in the output with -E --preproc-token-limit Maximum tokens on a line allowed by preprocessor --private Debugging; see docs --prof-c Compile C++ code with profiling --prof-cfuncs Name functions for profiling --prof-exec Enable generating execution profile for gantt chart --prof-pgo Enable generating profiling data for PGO --protect-ids Hash identifier names for obscurity --protect-key <key> Key for symbol protection --protect-lib <name> Create a DPI protected library --public Mark signals as public; see docs --public-depth <level> Mark public to specified module depth --public-flat-rw Mark all variables, etc as public_flat_rw --public-ignore Ignore all public comment markings --public-params Mark all parameters as public_flat -pvalue+<name>=<value> Overwrite toplevel parameter --quiet Minimize additional printing --quiet-build Don't print build progress --quiet-exit Don't print the command on failure --quiet-stats Don't print statistics --relative-includes Resolve includes relative to current file --reloop-limit <value> Minimum iterations for forming loops --replication-limit <value> Replication concatenation limit (default: 8k) --report-unoptflat Extra diagnostics for UNOPTFLAT --rr Run Verilator and record with rr --runtime-debug Enable model runtime debugging --savable Enable model save-restore --sc Create SystemC output --sched-zero-delay Specify #0 delay support --no-skip-identical Disable skipping identical output --stats Create statistics file --stats-vars Provide statistics on variables --no-std Prevent loading standard files --no-std-package Prevent parsing standard package --no-std-waiver Prevent parsing standard lint waivers --no-stop-fail Do not call $stop when assertion fails -sv Enable SystemVerilog parsing +systemverilogext+<ext> Synonym for +1800-2023ext+<ext> --threads <threads> Enable multithreading --threads-dpi <mode> Enable multithreaded DPI --threads-max-mtasks <mtasks> Tune maximum mtask partitioning --timescale <timescale> Sets default timescale --timescale-override <timescale> Overrides all timescales --timing Enable timing support --no-timing Disable timing support --top <topname> Alias of --top-module --top-module <topname> Name of top-level input module --trace Enable VCD waveform creation --trace-coverage Enable tracing of coverage --trace-depth <levels> Depth of tracing --trace-fst Enable FST waveform creation --trace-max-array <depth> Maximum array depth for tracing --trace-max-width <width> Maximum bit width for tracing --trace-params Enable tracing of parameters --trace-saif Enable SAIF file creation --trace-structs Enable tracing structure names --no-trace-top Do not emit traces for signals in the top module generated by verilator --trace-underscore Enable tracing of _signals --trace-vcd Enable VCD waveform creation -U<var> Undefine preprocessor define --no-unlimited-stack Don't disable stack size limit --unroll-count <loops> Tune maximum loop iterations --unroll-limit <loops> Maximum loop iterations before assuming infinite loop --unroll-stmts <stmts> Tune maximum loop body size --unused-regexp <regexp> Tune UNUSED lint signals -V Verbose version and config -v <filename> Verilog library --valgrind Run Verilator under valgrind --no-verilate Skip Verilation and just compile previously Verilated code --verilate-jobs Job threads for Verilation stage +verilog1995ext+<ext> Synonym for +1364-1995ext+<ext> +verilog2001ext+<ext> Synonym for +1364-2001ext+<ext> --version Show program version and exits --vpi Enable VPI compiles --waiver-multiline Create multiline --match for waivers --waiver-output <filename> Create a waiver file based on linter warnings -Wall Enable all style warnings -Werror-<message> Convert warnings to errors -Wfuture-<message> Disable unknown message warnings -Wno-<message> Disable warning -Wno-context Disable source context on warnings -Wno-fatal Disable fatal exit on warnings -Wno-lint Disable all lint warnings -Wno-style Disable all style warnings -work <libname> Set config library for following files -Wpedantic Warn on compliance-test issues -Wwarn-<message> Enable specified warning message -Wwarn-lint Enable lint warning message -Wwarn-style Enable style warning message --x-assign <mode> Assign non-initial Xs to this value --x-initial <mode> Assign initial Xs to this value --x-initial-edge Enable initial X->0 and X->1 edge triggers -y <dir> Directory to search for modules This is a short summary of the simulation runtime arguments, i.e. for the final Verilated simulation runtime models. See <https://verila- tor.org/guide/latest/exe_verilator.html> for the detailed description of these arguments. +verilator+coverage+file+<filename> Set coverage output filename +verilator+debug Enable debugging +verilator+debugi+<value> Enable debugging at a level +verilator+error+limit+<value> Set error limit +verilator+help Show help +verilator+log+file+<filename> Log stdout and stderr output to filename +verilator+noassert Disable assert checking +verilator+prof+exec+file+<filename> Set execution profile filename +verilator+prof+exec+start+<value> Set execution profile starting point +verilator+prof+exec+window+<value> Set execution profile duration +verilator+prof+vlt+file+<filename> Set PGO profile filename +verilator+quiet Minimize additional printing +verilator+rand+reset+<value> Set random reset technique +verilator+seed+<value> Set random seed +verilator+solver+file+<filename> Set random solver log filename +verilator+V Show verbose version and config +verilator+version Show version and exit +verilator+vpi+<library>[:<bootstrap>] Load VPI shared library +verilator+wno+unsatconstr+<value> Disable constraint warnings DISTRIBUTION The latest version is available from <https://verilator.org>. Copyright 2003-2026 by Wilson Snyder. This program is free software; you can redistribute it and/or modify the Verilator internals under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. All Verilog and C++/SystemC code quoted within this documentation file are released as Creative Commons Public Domain (CC0). Many example files and test files are likewise released under CC0 into effectively the Public Do- main as described in the files themselves. SEE ALSO verilator_coverage, verilator_gantt, verilator_profcfunc, make, "verilator --help" which is the source for this document, and <https://verilator.org/verilator_doc.html> for detailed documentation. perl v5.42.3 2026-07-01 VERILATOR(1)
NAME | SYNOPSIS | DESCRIPTION | ARGUMENT SUMMARY | DISTRIBUTION | SEE ALSO
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