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rte_dma_port_param(3)		     DPDK		 rte_dma_port_param(3)

NAME
       rte_dma_port_param

SYNOPSIS
       #include	<rte_dmadev.h>

   Data	Fields
       enum rte_dma_port_type port_type
       uint64_t	reserved [2]
       uint64_t	coreid:	4
       uint64_t	pfid: 8
       uint64_t	vfen: 1
       uint64_t	vfid: 16
       uint64_t	pasid: 20
       uint64_t	attr: 3
       uint64_t	ph: 2
       uint64_t	st: 16
       union {
       } pcie

Detailed Description
       A structure used	to descript DMA	access port parameters.

       See also
	   struct rte_dma_vchan_conf::src_port

	   struct rte_dma_vchan_conf::dst_port

       Definition at line 498 of file rte_dmadev.h.

Field Documentation
   enum	rte_dma_port_type port_type
       The device access port type.

       See also
	   enum	rte_dma_port_type

       Definition at line 503 of file rte_dmadev.h.

   uint64_t coreid
       PCIe core id used.

       Definition at line 556 of file rte_dmadev.h.

   uint64_t pfid
       PF id used.

       Definition at line 557 of file rte_dmadev.h.

   uint64_t vfen
       VF enable bit.

       Definition at line 558 of file rte_dmadev.h.

   uint64_t vfid
       VF id used.

       Definition at line 559 of file rte_dmadev.h.

   uint64_t pasid
       The pasid filed in TLP packet.

       Definition at line 561 of file rte_dmadev.h.

   uint64_t attr
       The attributes filed in TLP packet.

       Definition at line 563 of file rte_dmadev.h.

   uint64_t ph
       The processing hint filed in TLP	packet.

       Definition at line 565 of file rte_dmadev.h.

   uint64_t st
       The steering tag	filed in TLP packet.

       Definition at line 567 of file rte_dmadev.h.

   __extension__ union	{ ... }	 pcie
       PCIe access port	parameters.

       The following model shows SoC's PCIe module connects to multiple	PCIe
       hosts and multiple endpoints. The PCIe module has an integrated DMA
       controller.

       If the DMA wants	to access the memory of	host A,	it can be initiated by
       PF1 in core0, or	by VF0 of PF0 in core0.

       System Bus
	  |	----------PCIe module----------
	  |	Bus
	  |	Interface
	  |	-----	     ------------------
	  |	|   |	     | PCIe Core0     |
	  |	|   |	     |		      |	       -----------
	  |	|   |	     |	 PF-0 -- VF-0 |	       | Host A	 |
	  |	|   |--------|	      |- VF-1 |--------| Root	 |
	  |	|   |	     |	 PF-1	      |	       | Complex |
	  |	|   |	     |	 PF-2	      |	       -----------
	  |	|   |	     ------------------
	  |	|   |
	  |	|   |	     ------------------
	  |	|   |	     | PCIe Core1     |
	  |	|   |	     |		      |	       -----------
	  |	|   |	     |	 PF-0 -- VF-0 |	       | Host B	 |
	  |-----|   |--------|	 PF-1 -- VF-0 |--------| Root	 |
	  |	|   |	     |	      |- VF-1 |	       | Complex |
	  |	|   |	     |	 PF-2	      |	       -----------
	  |	|   |	     ------------------
	  |	|   |
	  |	|   |	     ------------------
	  |	|DMA|	     |		      |	       ------
	  |	|   |	     |		      |--------| EP |
	  |	|   |--------| PCIe Core2     |	       ------
	  |	|   |	     |		      |	       ------
	  |	|   |	     |		      |--------| EP |
	  |	|   |	     |		      |	       ------
	  |	-----	     ------------------

       Note
	   If some fields can not be supported by the hardware/driver, then
	   the driver ignores those fields. Please check driver-specific
	   documentation for limitations and capabilities.

   uint64_t reserved[2]
       Reserved	for future fields.

       Definition at line 572 of file rte_dmadev.h.

Author
       Generated automatically by Doxygen for DPDK from	the source code.

Version	25.11.0			Thu Jun	11 2026		 rte_dma_port_param(3)

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