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UHD(1)				 User Commands				UHD(1)

NAME
       rfnoc_image_builder - Build UHD image using RFNoC blocks.

USAGE
       rfnoc_image_builder [-h]	(-y YAML_CONFIG	| -r GRC_CONFIG) [-C BASE_DIR]
       [-F  FPGA_DIR]  [-B  BUILD_DIR] [-O BUILD_OUTPUT_DIR] [-E BUILD_IP_DIR]
       [-o IMAGE_CORE_OUTPUT] [-I INCLUDE_DIR] [-b GRC_BLOCKS] [-l  LOG_LEVEL]
       [-R]  [-G]  [-W]	 [-S  SECURE_CORE] [-K SECURE_KEY] [-d DEVICE] [-n IM-
       AGE_CORE_NAME] [-t TARGET] [-g] [-Y] [--CHECK] [-s] [-P]	[-j JOBS] [-c]
       [-p VIVADO_PATH]	[-H] [-D] [--color {never,auto,always}]

   optional arguments:
       -h, --help
	      show a help message and exit

       -y YAML_CONFIG, --yaml-config YAML_CONFIG
	      Path to YAML configuration file (image core file).  Either  this
	      option or	--grc-config is	required.

       -r GRC_CONFIG, --grc-config GRC_CONFIG
	      Path to .grc file	to generate config from

       -C BASE_DIR, --base-dir BASE_DIR
	      Path to the base directory. Defaults to the current directory.

       -F FPGA_DIR, --fpga-dir FPGA_DIR
	      Path to directory	for the	FPGA source tree. Defaults to the FPGA
	      source tree of the current repo.

       -B BUILD_DIR, --build-dir BUILD_DIR
	      Path  to	directory where	the image core and and build artifacts
	      will be generated. Defaults to "build-<image-core-name>" in  the
	      base directory.

       -O BUILD_OUTPUT_DIR, --build-output-dir BUILD_OUTPUT_DIR
	      Path  to	directory  for	final  FPGA build outputs. Defaults to
	      "build" in the base directory.

       -E BUILD_IP_DIR,	--build-ip-dir BUILD_IP_DIR
	      Path to directory	for IP build artifacts.	Defaults to "build-ip"
	      in the base directory.

       -o IMAGE_CORE_OUTPUT, --image-core-output IMAGE_CORE_OUTPUT
	      DEPRECATED! This has been	replaced by --build-dir.

       -x ROUTER_HEX_OUTPUT, --router-hex-output ROUTER_HEX_OUTPUT
	      DEPRECATED! This option will be ignored.

       -I INCLUDE_DIR, --include-dir INCLUDE_DIR
	      Path to directory	of the RFNoC Out-of-Tree module

       -b GRC_BLOCKS, --grc-blocks GRC_BLOCKS
	      Path  to	directory  of  GRC  block  descriptions	 (needed   for
	      --grc-config only)

       -l LOG_LEVEL, --log-level LOG_LEVEL
	      Adjust log level

       -R, --reuse
	      Reuse existing files (do not regenerate image core).

       -G, --generate-only
	      Just generate files without building the FPGA

       -W, --ignore-warnings
	      Run build	even when there	are warnings in	the build process.

       -S SECURE_CORE, --secure-core SECURE_CORE
	      Build  a	secure	image core instead of a	bitfile. This argument
	      provides the name	of the generated YAML.

       -K SECURE_KEY, --secure-key SECURE_KEY
	      Path to encryption key file to use for secure core.

       -d DEVICE, --device DEVICE
	      Device to	be programmed [x300, x310,  e310,  e320,  n300,	 n310,
	      n320,  x410, x440]. Needs	to be specified	either here, or	in the
	      configuration file.

       -n IMAGE_CORE_NAME, --image-core-name IMAGE_CORE_NAME, --im-
       age_core_name IMAGE_CORE_NAME
	      Name to use for the RFNoC	image core. Defaults to	 name  of  the
	      image core YML file, without the extension.

       -t TARGET, --target TARGET
	      Build target (e.g. X310_HG, N320_XG, ...). Needs to be specified
	      either here, on the configuration	file.

       -g, --GUI
	      Open Vivado GUI during the FPGA building process.

       -Y, --SYNTH
	      Stop the FPGA build process after	Synthesis.

       -C, --CHECK
	      Run elaboration only to check HDL	syntax.

       -s, --save-project
	      Save Vivado project to disk.

       -P, --ip-only
	      Build only the required IPs.

       -j JOBS,	--jobs JOBS
	      Number of	parallel jobs to use with make.

       -c, --clean-all
	      Cleans the IP before a new build.

       -p VIVADO_PATH, --vivado-path VIVADO_PATH
	      Path to the base install for Xilinx Vivado if not	in default lo-
	      cation (e.g., /tools/Xilinx/Vivado).

       -H, --no-hash
	      Do not include source YAML hash in the generated source code.

       -D, --no-date
	      Do not include date or time in the generated source code.

       --color {never,auto,always}
	      Enable  colorful output. When set	to 'auto' will only show color
	      output in	TTY environments (e.g.,	interactive shells).

DESCRIPTION
       This tool takes a YAML configuration file and generates an FPGA bitfile
       that can	be used	with an	RFNoC-capable UHD device. The YAML  configura-
       tion  file  describes  the  RFNoC blocks	that are to be included	in the
       FPGA image, along with the connections between the blocks, and any  ad-
       ditional	configuration that is required for the blocks.

SEE ALSO
       UHD documentation: https://uhd.readthedocs.io/

       Other UHD programs:

       uhd_cal_tx_dc_offset(1)	  uhd_cal_rx_iq_balance(1)    uhd_images_down-
       loader(1) uhd_config_info(1) uhd_find_devices(1)

AUTHOR
       This manual page	was written by Maitland	Bottoms	for the	Debian project
       (but may	be used	by others).

COPYRIGHT
       Copyright (c) 2020 Ettus	Research LLC

       This program is free software: you can redistribute it and/or modify it
       under the terms of the GNU General Public License as published  by  the
       Free  Software Foundation, either version 3 of the License, or (at your
       option) any later version.

       This program is distributed in the hope that it	will  be  useful,  but
       WITHOUT	ANY  WARRANTY;	without	 even  the  implied  warranty  of MER-
       CHANTABILITY or FITNESS FOR A PARTICULAR	PURPOSE.  See the GNU  General
       Public License for more details.

UHD 4				 December 2024				UHD(1)

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