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TI_ADC(4)		  arm Kernel Interfaces Manual		       TI_ADC(4)

NAME
     ti_adc -- TI AM3XXX analog to digital converter driver

SYNOPSIS
     device ti_adc

DESCRIPTION
     The  ti_adc  driver  provides  access  to the AIN (analog inputs) on am3xxx
     SoCs.

     It provides raw readings of the converted values for each analog inputs.

     The access to ti_adc data is made via the sysctl(8) interface:

     dev.ti_adc.0.%desc: TI ADC controller
     dev.ti_adc.0.%driver: ti_adc
     dev.ti_adc.0.%pnpinfo: name=adc@44E0D000 compat=ti,adc
     dev.ti_adc.0.%parent: simplebus0
     dev.ti_adc.0.clockdiv: 2400
     dev.ti_adc.0.ain.0.enable: 0
     dev.ti_adc.0.ain.0.open_delay: 0
     dev.ti_adc.0.ain.0.samples_avg: 0
     dev.ti_adc.0.ain.0.input: 0
     dev.ti_adc.0.ain.1.enable: 0
     dev.ti_adc.0.ain.1.open_delay: 0
     dev.ti_adc.0.ain.1.samples_avg: 0
     dev.ti_adc.0.ain.1.input: 0
     dev.ti_adc.0.ain.2.enable: 0
     dev.ti_adc.0.ain.2.open_delay: 0
     dev.ti_adc.0.ain.2.samples_avg: 0
     dev.ti_adc.0.ain.2.input: 0
     dev.ti_adc.0.ain.3.enable: 0
     dev.ti_adc.0.ain.3.open_delay: 0
     dev.ti_adc.0.ain.3.samples_avg: 0
     dev.ti_adc.0.ain.3.input: 0
     dev.ti_adc.0.ain.4.enable: 0
     dev.ti_adc.0.ain.4.open_delay: 0
     dev.ti_adc.0.ain.4.samples_avg: 0
     dev.ti_adc.0.ain.4.input: 0
     dev.ti_adc.0.ain.5.enable: 0
     dev.ti_adc.0.ain.5.open_delay: 0
     dev.ti_adc.0.ain.5.samples_avg: 0
     dev.ti_adc.0.ain.5.input: 0
     dev.ti_adc.0.ain.6.enable: 1
     dev.ti_adc.0.ain.6.open_delay: 0
     dev.ti_adc.0.ain.6.samples_avg: 4
     dev.ti_adc.0.ain.6.input: 2308
     dev.ti_adc.0.ain.7.enable: 1
     dev.ti_adc.0.ain.7.open_delay: 0
     dev.ti_adc.0.ain.7.samples_avg: 0
     dev.ti_adc.0.ain.7.input: 3812

     On Beaglebone-black the analog input  7  is  connected  to  the  3V3B  rail
     through  a  voltage  divisor  (2:1).   The 3V3B voltage rail comes from the
     TL5209 LDO regulator which is limited to 500mA maximum.

     Global settings:

     dev.ti_adc.0.clockdiv  Sets the ADC clock prescaler.  The minimum value  is
			    10 and the maximum is 65535.  The ADC clock is based
			    on CLK_M_OSC (24Mhz) / clockdiv.  This gives a maxi-
			    mum  of ~2.4Mhz for the ADC clock and ~10Khz for the
			    default setting (clockdiv = 2400).

     Settings per input:

     dev.ti_adc.0.ain.%d.enable       Enable the conversion for the input.  Each
				      input should be individually  enabled  be-
				      fore  it can be used.  When all the inputs
				      are disabled, the ADC is turned off.

     dev.ti_adc.0.ain.%d.open_delay   Sets the number of  ADC  clock  cycles  to
				      wait  after  applying the input configura-
				      tion and before start the ADC conversion.

     dev.ti_adc.0.ain.%d.samples_avg  Sets the number of samples average used on
				      each input, it can be set to 0 (no samples
				      average), 2, 4, 8, or 16.

     dev.ti_adc.0.ain.%d.input	      Is the converted raw value of the  voltage
				      applied  on  the analog input.  It is made
				      of a 12 bit value (0 ~ 4095).

SEE ALSO
     sysctl(8)

HISTORY
     The ti_adc driver first appeared in FreeBSD 10.1.

AUTHORS
     The driver and this  manual  page	was  written  by  Luiz	Otavio	O  Souza
     <loos@FreeBSD.org>.

FreeBSD ports 15.1		  June 1, 2014			       TI_ADC(4)

Want to link to this manual page? Use this URL:
<https://man.freebsd.org/cgi/man.cgi?query=ti_adc&sektion=4&manpath=FreeBSD+15.1-RELEASE+and+Ports>

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